One type of semiconductor construction is a metal-insulator-metal (MIM) capacitor construction. A fragment 10 of a semiconductor structure is illustrated in FIG. 1, and such shows an exemplary MIM capacitor construction 20. More specifically, fragment 10 comprises a substrate 12 having a conductively-doped diffusion region 14 therein. Substrate 12 can comprise, for example, monocrystalline silicon. To aid in interpretation of the claims that follow, the terms “semiconductive substrate” and “semiconductor substrate” are defined to mean any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials thereon), and semiconductive material layers (either alone or in assemblies comprising other materials). The term “substrate” refers to any supporting structure, including, but not limited to, the semiconductive substrates described above.
Conductively-doped diffusion region 14 can be doped with one or both of n-type and p-type dopant.
A conductive pedestal 16 is supported by substrate 12, and formed in electrical connection with diffusion region 14. Pedestal 16 can comprise metal and/or conductively doped silicon. In particular aspects, pedestal 16 will comprise, consist essentially of, or consist of conductively-doped silicon such as, for example, conductively-doped polycrystalline silicon.
An insulative mass 18 is formed over substrate 12 and around pedestal 16. Alternatively, pedestal 16 can be considered to extend through mass 18 and to the diffusion region 14 formed within substrate 12. Mass 18 can comprise, for example, borophosphosilicate glass (BPSG).
A first capacitor electrode 22 and barrier 24 extend within an opening in insulative material 18 to electrically contact pedestal 16. First capacitor electrode 22 will comprise a metal in a MIM construction, and can comprise, for example, one or more of platinum, rhodium, ruthenium, titanium, tantalum and tungsten. Barrier layer 24 can comprise, for example, titanium nitride, tantalum nitride, and/or tantalum silicon nitride.
An insulative material 26 is formed over capacitor electrode 22. Material 26 can comprise, for example, one or more of aluminum oxide (Al2O3), tantalum pentoxide, barium strontium titanate (BST), lead zirconate titanate (PZT), and/or lead lanthanum zirconate titanate (PLZT).
Barrier layer 24 is provided to alleviate and/or prevent cross-diffusion of materials from dielectric 26 and conductive pedestal 16. Specifically, silicon from a silicon-containing pedestal 16 can migrate through conductive material 22, and oxygen from a dielectric material 26 can also migrate through conductive material 22.
The migration of materials through conductive material 22 is thought to occur along grain boundaries. Specifically, material 22 will generally be formed as a layer, as shown, and will comprise columnar grains extending through the thickness of the layer and defining boundaries 23 between the grains. The boundaries 23 can, as shown, extend across an entirety of the thickness of material 22. Oxygen and silicon are believed to be able to migrate along boundaries 23, and thereby pass through conductive material 22. Barrier layer 24 is provided to block such migration through material 22.
A final component of structure 10 is a second capacitor electrode 28 which is provided over dielectric material 26. Electrode 28 can comprise any of various conductive materials, including, for example, the same conductive materials described above for incorporation into the first capacitor electrode 22.
Capacitor electrode 28 is capacitively separated from first electrode 22 by dielectric material 26. Accordingly, first electrode 22, dielectric material 26 and second electrode 28 together define at least a portion of a capacitor construction.
It would be desirable to develop new methods for alleviating or preventing diffusion through metal layers (such as, for example, the capacitor electrode 22 metal layer of FIG. 1), and to incorporate such methods into formation of electrical contacts and/or capacitor constructions.